ASIC production is a part-science, part-art discipline that not only requires a technical understanding but has great financial implications.
Manufacturing costs include wafer production, packaging and QA activities such as electrical tests in order to secure correct working products. Generally speaking, the more your company is involved in these activities, the lower production costs can be. However, taking full ownership over production is often not possible, nor financially wise.
By reading this article, you’ll learn about:
- The cons and pros of three common business models for chip and IC production
- The financial impact of each of the models
- The production volume breakeven points where one model has an obvious financial benefit over another
ASIC production is a part-science, part-art discipline which requires extensive knowledge.
ASIC production is a part-science, part-art discipline which requires extensive knowledge. The many available options, which combine various 3rd party services and internal resources, require an understanding of the technical intricacies, the pros and cons, and the financial implications of each option. The more knowledge you have, the cheaper ASIC production can be for your company.
Production costs can be broken into three parts: wafer production, packaging and QA activities such as electrical tests in order to secure correct working products. In the long run, the more your company is involved in these activities, the lower production costs can be. However, taking full ownership overproduction is often not possible, nor financially wise.
This article examines three common business models for chip and IC production and the financial impact of each. Using a real-life project case, it then identifies production volume breakeven points, distinguishing where one production model has an obvious financial benefit over another.
Three Methods for Producing Chips and ICs
First, let’s briefly review the three models available for designing and producing ASICs. The three methods for producing chips and ICs:
- Standard Components
At the simplest level, an electronic product can be built using standard, off-the-shelf components. Using this method, standard electronic components are purchased from any of the large companies such as Intel, Broadcom or Analog Devices, and an electronic solution is designed around these components.
This method offers fast prototyping, low production costs and a short time to market. The top drawback is the lack of differentiation from your competitors since the final product is easy to copy. Another shortcoming is the reliance on chip suppliers for the availability of components. If a standard component becomes obsolete, you are forced to redesign the product.
From a financial perspective, design costs are minimal. However, the gross margin of chip suppliers is high, typically at the level of 50-65 %. This can be confirmed by looking at public stock exchange data on chipmaker vendors.
As the ASIC (Application-Specific Integrated Circuit) name suggests, this model enables building a device (chip and/or integrated circuit) with a specific purpose in mind.
In the ASIC model, your company takes part in the ASIC design process. You perform as much or as little of the design work your company is capable of – either internally within the company or using an external partner – and then outsource the rest of the production to an ASIC vendor. The ASIC supplier sources the wafers assembles dies, builds the complete chip, and then tests the ASIC for defects.
The top advantage of the ASIC model is Intellectual Property (IP) ownership. The work invested in design can be enhanced and reused, and chips cannot be copied by competitors. Your selected ASIC vendor produces the chips and shoulders responsibility for the production, which eliminates the need to hire in-house professionals experienced in semiconductor production; to manage the logistics, scheduling and supply chain; and coordinate between multiple partners. Finally, the ASIC model avoids surprises raised by obsolete components and provides a custom circuit that cannot be copied.
From a financial perspective, the ASIC model typically involves a 30-50% gross margin of the ASIC vendor on the Bill of Materials. The lower gross margin (compared to using standard components) is due to your company owning the designed IP (without any royalties) and having reduced distribution costs. On the other hand, the ASIC model requires a large upfront investment in the ASIC design phase.
The ASIC chip fabrication model is common in the medical and telecommunication industries, where companies take full control over the design of their chip, but use ASIC production vendors for manufacturing, due to having limited experience in the fabrication intricacies of silicon.
Another process that may occur is an Integrated Device Manufacturer (IDM), which has large production volumes, switches from the ‘standard components’ model to the ASIC model in order to save costs. For example, one IDM, which used standard components valued at $8 USD per device, was able to reduce its BOM (Bill of Materials) to $5 USD by shifting to an ASIC model.
Customer Owned Tooling, commonly referred to as COT, is the semiconductor industry version of do-it-yourself. In the COT model, you take full responsibility for the IC design and production of your own chip. This implies handing over GDSII design data to a foundry such as TSMC, GLOBALFOUNDRIES or UMC, and directly interacting with additional semiconductor suppliers to design packaging and testing as needed.
The attractiveness of the COT model is primarily cost savings since the direct interaction with vendors results in savings on the gross margin for intermediaries. Relying on your in-house knowledge, you master the supply chain and hence get the optimal process for the individual activities.
This model is very attractive for large-value projects where volume is high, or the chip is large and drives up costs. For example, in the long run, a company with large-scale project economy can benefit from 10% savings just from reducing one or more aggregator partners.
However, in order to benefit from this model, a large, up-front investment is required to adopt a COT flow as well as a need for a certain economy of scale. A significant scope of in-house technical expertise is required, which is often underestimated. This includes a working knowledge of silicon manufacturing processes, hiring skilled chip development professionals, managing packaging suppliers, testing, and managing logistics of the entire supply chain. In addition, you must also manage and troubleshoot problems with suppliers, quality, scheduling, etc.
Often, companies prefer to maintain focus on their core expertise developing and marketing new products and prefer not to expand and invest in developing chip design and production expertise. The majority of companies do not have the number of projects and volume that make the COT model economically viable.
Business Model Comparison
These three chip production alternatives are perhaps easiest to understand using a metaphor of a pizza. (While this is obviously a simplified comparison, it explains the essence of each of the methods):
Supermarket pizza (= standard components) offers the quickest way and cheapest development cost, yet with no control over availability and ingredients. In addition, there are distribution costs and food waste in the supermarket.
Pizzeria (= ASIC model) offers custom-made, high-quality output with professionals managing the process. Here, the distribution costs and food waste are eliminated to a minimum since the pizza is ordered and picked up at the same location.
Homemade pizza (= COT model) offers full ownership and control over the processes of the ‘design’ and production of the pizza. This, however, requires expertise, as well as an upfront investment in resources and equipment, such as the baking stove.
The three models of producing ASIC and the financial aspects of each can be best illustrated using a real-life customer case study, which had the production parameters listed below.
Based on these production parameters, the total cost over the 5- and a 10-year lifetime of the project would be calculated as follows:
Cost calculations for this project would include:
Component costs: This is the BOM cost per component (wafer material, wafer testing, packaging, and final test). Component cost is different between models due to the gross margin of vendors.
Design: In the ASIC and COT production models, the design of the chip/IC is performed either internally or using an external partner. This requires an upfront investment, which may vary significantly, depending on IP availability, the complexity of the product, and the level of expertise required. For this business case, the estimated design cost for the project is $1.1 Million dollars, which includes the mask set and other ramp-to-production activities.
Supply chain management: The COT production model assumes full ownership and management of the production process. We estimate that implementing the tools, personnel, knowledge, and equipment internally would add another $1 Million dollars during the lifetime of the project.
Which Method is Suitable for Which Volume?
While each project is unique and has different requirements affecting production decisions, such as IP protection, reusability, and the available financial and human resources, the cost is always a major parameter. As the data in this paper demonstrate, the lifetime production volume may be a key factor to identify the most cost-effective production model for your project. This is illustrated by the graph below, which examines total costs as a function of volume. In our use case, the ASIC model becomes more economical than standard components at around 1 million units, whereas the COT model cost-effectiveness requires a production volume above 7.5 million units.